regs.h 12 KB

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  1. /* Define per-register tables for data flow info and register allocation.
  2. Copyright (C) 1987-2019 Free Software Foundation, Inc.
  3. This file is part of GCC.
  4. GCC is free software; you can redistribute it and/or modify it under
  5. the terms of the GNU General Public License as published by the Free
  6. Software Foundation; either version 3, or (at your option) any later
  7. version.
  8. GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  9. WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  11. for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with GCC; see the file COPYING3. If not see
  14. <http://www.gnu.org/licenses/>. */
  15. #ifndef GCC_REGS_H
  16. #define GCC_REGS_H
  17. #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
  18. /* When you only have the mode of a pseudo register before it has a hard
  19. register chosen for it, this reports the size of each hard register
  20. a pseudo in such a mode would get allocated to. A target may
  21. override this. */
  22. #ifndef REGMODE_NATURAL_SIZE
  23. #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
  24. #endif
  25. /* Maximum register number used in this function, plus one. */
  26. extern int max_regno;
  27. /* REG_N_REFS and REG_N_SETS are initialized by a call to
  28. regstat_init_n_sets_and_refs from the current values of
  29. DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
  30. should only be used if a pass need to change these values in some
  31. magical way or the pass needs to have accurate values for these
  32. and is not using incremental df scanning.
  33. At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
  34. should be made to regstat_free_n_sets_and_refs.
  35. Local alloc seems to play pretty loose with these values.
  36. REG_N_REFS is set to 0 if the register is used in an asm.
  37. Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
  38. REG_N_SETS for three address insns. Other passes seem to have
  39. other special values. */
  40. /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
  41. struct regstat_n_sets_and_refs_t
  42. {
  43. int sets; /* # of times (REG n) is set */
  44. int refs; /* # of times (REG n) is used or set */
  45. };
  46. extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
  47. /* Indexed by n, gives number of times (REG n) is used or set. */
  48. static inline int
  49. REG_N_REFS (int regno)
  50. {
  51. return regstat_n_sets_and_refs[regno].refs;
  52. }
  53. /* Indexed by n, gives number of times (REG n) is used or set. */
  54. #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
  55. #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
  56. /* Indexed by n, gives number of times (REG n) is set. */
  57. static inline int
  58. REG_N_SETS (int regno)
  59. {
  60. return regstat_n_sets_and_refs[regno].sets;
  61. }
  62. /* Indexed by n, gives number of times (REG n) is set. */
  63. #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
  64. #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
  65. /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */
  66. extern bool reg_is_parm_p (rtx);
  67. /* Functions defined in regstat.c. */
  68. extern void regstat_init_n_sets_and_refs (void);
  69. extern void regstat_free_n_sets_and_refs (void);
  70. extern void regstat_compute_ri (void);
  71. extern void regstat_free_ri (void);
  72. extern bitmap regstat_get_setjmp_crosses (void);
  73. extern void regstat_compute_calls_crossed (void);
  74. extern void regstat_free_calls_crossed (void);
  75. extern void dump_reg_info (FILE *);
  76. /* Register information indexed by register number. This structure is
  77. initialized by calling regstat_compute_ri and is destroyed by
  78. calling regstat_free_ri. */
  79. struct reg_info_t
  80. {
  81. int freq; /* # estimated frequency (REG n) is used or set */
  82. int deaths; /* # of times (REG n) dies */
  83. int calls_crossed; /* # of calls (REG n) is live across */
  84. int basic_block; /* # of basic blocks (REG n) is used in */
  85. };
  86. extern struct reg_info_t *reg_info_p;
  87. /* The number allocated elements of reg_info_p. */
  88. extern size_t reg_info_p_size;
  89. /* Estimate frequency of references to register N. */
  90. #define REG_FREQ(N) (reg_info_p[N].freq)
  91. /* The weights for each insn varies from 0 to REG_FREQ_BASE.
  92. This constant does not need to be high, as in infrequently executed
  93. regions we want to count instructions equivalently to optimize for
  94. size instead of speed. */
  95. #define REG_FREQ_MAX 1000
  96. /* Compute register frequency from the BB frequency. When optimizing for size,
  97. or profile driven feedback is available and the function is never executed,
  98. frequency is always equivalent. Otherwise rescale the basic block
  99. frequency. */
  100. #define REG_FREQ_FROM_BB(bb) (optimize_function_for_size_p (cfun) \
  101. ? REG_FREQ_MAX \
  102. : ((bb)->count.to_frequency (cfun) \
  103. * REG_FREQ_MAX / BB_FREQ_MAX) \
  104. ? ((bb)->count.to_frequency (cfun) \
  105. * REG_FREQ_MAX / BB_FREQ_MAX) \
  106. : 1)
  107. /* Indexed by N, gives number of insns in which register N dies.
  108. Note that if register N is live around loops, it can die
  109. in transitions between basic blocks, and that is not counted here.
  110. So this is only a reliable indicator of how many regions of life there are
  111. for registers that are contained in one basic block. */
  112. #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
  113. /* Get the number of consecutive words required to hold pseudo-reg N. */
  114. #define PSEUDO_REGNO_SIZE(N) \
  115. ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
  116. / UNITS_PER_WORD)
  117. /* Get the number of bytes required to hold pseudo-reg N. */
  118. #define PSEUDO_REGNO_BYTES(N) \
  119. GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
  120. /* Get the machine mode of pseudo-reg N. */
  121. #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
  122. /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
  123. #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
  124. /* Indexed by n, gives number of basic block that (REG n) is used in.
  125. If the value is REG_BLOCK_GLOBAL (-1),
  126. it means (REG n) is used in more than one basic block.
  127. REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
  128. This information remains valid for the rest of the compilation
  129. of the current function; it is used to control register allocation. */
  130. #define REG_BLOCK_UNKNOWN 0
  131. #define REG_BLOCK_GLOBAL -1
  132. #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
  133. /* Vector of substitutions of register numbers,
  134. used to map pseudo regs into hardware regs.
  135. This can't be folded into reg_n_info without changing all of the
  136. machine dependent directories, since the reload functions
  137. in the machine dependent files access it. */
  138. extern short *reg_renumber;
  139. /* Flag set by local-alloc or global-alloc if they decide to allocate
  140. something in a call-clobbered register. */
  141. extern int caller_save_needed;
  142. /* Select a register mode required for caller save of hard regno REGNO. */
  143. #ifndef HARD_REGNO_CALLER_SAVE_MODE
  144. #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
  145. choose_hard_reg_mode (REGNO, NREGS, false)
  146. #endif
  147. /* Target-dependent globals. */
  148. struct target_regs {
  149. /* For each starting hard register, the number of consecutive hard
  150. registers that a given machine mode occupies. */
  151. unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
  152. /* For each hard register, the widest mode object that it can contain.
  153. This will be a MODE_INT mode if the register can hold integers. Otherwise
  154. it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
  155. register. */
  156. machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
  157. /* Vector indexed by machine mode saying whether there are regs of
  158. that mode. */
  159. bool x_have_regs_of_mode[MAX_MACHINE_MODE];
  160. /* 1 if the corresponding class contains a register of the given mode. */
  161. char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
  162. /* 1 if the corresponding class contains a register of the given mode
  163. which is not global and can therefore be allocated. */
  164. char x_contains_allocatable_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
  165. /* Record for each mode whether we can move a register directly to or
  166. from an object of that mode in memory. If we can't, we won't try
  167. to use that mode directly when accessing a field of that mode. */
  168. char x_direct_load[NUM_MACHINE_MODES];
  169. char x_direct_store[NUM_MACHINE_MODES];
  170. /* Record for each mode whether we can float-extend from memory. */
  171. bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
  172. };
  173. extern struct target_regs default_target_regs;
  174. #if SWITCHABLE_TARGET
  175. extern struct target_regs *this_target_regs;
  176. #else
  177. #define this_target_regs (&default_target_regs)
  178. #endif
  179. #define reg_raw_mode \
  180. (this_target_regs->x_reg_raw_mode)
  181. #define have_regs_of_mode \
  182. (this_target_regs->x_have_regs_of_mode)
  183. #define contains_reg_of_mode \
  184. (this_target_regs->x_contains_reg_of_mode)
  185. #define contains_allocatable_reg_of_mode \
  186. (this_target_regs->x_contains_allocatable_reg_of_mode)
  187. #define direct_load \
  188. (this_target_regs->x_direct_load)
  189. #define direct_store \
  190. (this_target_regs->x_direct_store)
  191. #define float_extend_from_mem \
  192. (this_target_regs->x_float_extend_from_mem)
  193. /* Return the number of hard registers in (reg:MODE REGNO). */
  194. ALWAYS_INLINE unsigned char
  195. hard_regno_nregs (unsigned int regno, machine_mode mode)
  196. {
  197. return this_target_regs->x_hard_regno_nregs[regno][mode];
  198. }
  199. /* Return an exclusive upper bound on the registers occupied by hard
  200. register (reg:MODE REGNO). */
  201. static inline unsigned int
  202. end_hard_regno (machine_mode mode, unsigned int regno)
  203. {
  204. return regno + hard_regno_nregs (regno, mode);
  205. }
  206. /* Add to REGS all the registers required to store a value of mode MODE
  207. in register REGNO. */
  208. static inline void
  209. add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
  210. unsigned int regno)
  211. {
  212. unsigned int end_regno;
  213. end_regno = end_hard_regno (mode, regno);
  214. do
  215. SET_HARD_REG_BIT (*regs, regno);
  216. while (++regno < end_regno);
  217. }
  218. /* Likewise, but remove the registers. */
  219. static inline void
  220. remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
  221. unsigned int regno)
  222. {
  223. unsigned int end_regno;
  224. end_regno = end_hard_regno (mode, regno);
  225. do
  226. CLEAR_HARD_REG_BIT (*regs, regno);
  227. while (++regno < end_regno);
  228. }
  229. /* Return true if REGS contains the whole of (reg:MODE REGNO). */
  230. static inline bool
  231. in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
  232. unsigned int regno)
  233. {
  234. unsigned int end_regno;
  235. gcc_assert (HARD_REGISTER_NUM_P (regno));
  236. if (!TEST_HARD_REG_BIT (regs, regno))
  237. return false;
  238. end_regno = end_hard_regno (mode, regno);
  239. if (!HARD_REGISTER_NUM_P (end_regno - 1))
  240. return false;
  241. while (++regno < end_regno)
  242. if (!TEST_HARD_REG_BIT (regs, regno))
  243. return false;
  244. return true;
  245. }
  246. /* Return true if (reg:MODE REGNO) includes an element of REGS. */
  247. static inline bool
  248. overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
  249. unsigned int regno)
  250. {
  251. unsigned int end_regno;
  252. if (TEST_HARD_REG_BIT (regs, regno))
  253. return true;
  254. end_regno = end_hard_regno (mode, regno);
  255. while (++regno < end_regno)
  256. if (TEST_HARD_REG_BIT (regs, regno))
  257. return true;
  258. return false;
  259. }
  260. /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
  261. REGNO and MODE. */
  262. static inline void
  263. add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
  264. int nregs)
  265. {
  266. while (nregs-- > 0)
  267. SET_HARD_REG_BIT (*regs, regno + nregs);
  268. }
  269. /* Likewise, but remove the registers. */
  270. static inline void
  271. remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
  272. int nregs)
  273. {
  274. while (nregs-- > 0)
  275. CLEAR_HARD_REG_BIT (*regs, regno + nregs);
  276. }
  277. /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
  278. REGNO and MODE. */
  279. static inline bool
  280. range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
  281. int nregs)
  282. {
  283. while (nregs-- > 0)
  284. if (TEST_HARD_REG_BIT (set, regno + nregs))
  285. return true;
  286. return false;
  287. }
  288. /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
  289. REGNO and MODE. */
  290. static inline bool
  291. range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
  292. {
  293. while (nregs-- > 0)
  294. if (!TEST_HARD_REG_BIT (set, regno + nregs))
  295. return false;
  296. return true;
  297. }
  298. /* Get registers used by given function call instruction. */
  299. extern bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
  300. HARD_REG_SET default_set);
  301. #endif /* GCC_REGS_H */