tegra_drm.h 15 KB

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  1. /*
  2. * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #ifndef _TEGRA_DRM_H_
  23. #define _TEGRA_DRM_H_
  24. #include "drm.h"
  25. #if defined(__cplusplus)
  26. extern "C" {
  27. #endif
  28. #define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
  29. #define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
  30. /**
  31. * struct drm_tegra_gem_create - parameters for the GEM object creation IOCTL
  32. */
  33. struct drm_tegra_gem_create {
  34. /**
  35. * @size:
  36. *
  37. * The size, in bytes, of the buffer object to be created.
  38. */
  39. __u64 size;
  40. /**
  41. * @flags:
  42. *
  43. * A bitmask of flags that influence the creation of GEM objects:
  44. *
  45. * DRM_TEGRA_GEM_CREATE_TILED
  46. * Use the 16x16 tiling format for this buffer.
  47. *
  48. * DRM_TEGRA_GEM_CREATE_BOTTOM_UP
  49. * The buffer has a bottom-up layout.
  50. */
  51. __u32 flags;
  52. /**
  53. * @handle:
  54. *
  55. * The handle of the created GEM object. Set by the kernel upon
  56. * successful completion of the IOCTL.
  57. */
  58. __u32 handle;
  59. };
  60. /**
  61. * struct drm_tegra_gem_mmap - parameters for the GEM mmap IOCTL
  62. */
  63. struct drm_tegra_gem_mmap {
  64. /**
  65. * @handle:
  66. *
  67. * Handle of the GEM object to obtain an mmap offset for.
  68. */
  69. __u32 handle;
  70. /**
  71. * @pad:
  72. *
  73. * Structure padding that may be used in the future. Must be 0.
  74. */
  75. __u32 pad;
  76. /**
  77. * @offset:
  78. *
  79. * The mmap offset for the given GEM object. Set by the kernel upon
  80. * successful completion of the IOCTL.
  81. */
  82. __u64 offset;
  83. };
  84. /**
  85. * struct drm_tegra_syncpt_read - parameters for the read syncpoint IOCTL
  86. */
  87. struct drm_tegra_syncpt_read {
  88. /**
  89. * @id:
  90. *
  91. * ID of the syncpoint to read the current value from.
  92. */
  93. __u32 id;
  94. /**
  95. * @value:
  96. *
  97. * The current syncpoint value. Set by the kernel upon successful
  98. * completion of the IOCTL.
  99. */
  100. __u32 value;
  101. };
  102. /**
  103. * struct drm_tegra_syncpt_incr - parameters for the increment syncpoint IOCTL
  104. */
  105. struct drm_tegra_syncpt_incr {
  106. /**
  107. * @id:
  108. *
  109. * ID of the syncpoint to increment.
  110. */
  111. __u32 id;
  112. /**
  113. * @pad:
  114. *
  115. * Structure padding that may be used in the future. Must be 0.
  116. */
  117. __u32 pad;
  118. };
  119. /**
  120. * struct drm_tegra_syncpt_wait - parameters for the wait syncpoint IOCTL
  121. */
  122. struct drm_tegra_syncpt_wait {
  123. /**
  124. * @id:
  125. *
  126. * ID of the syncpoint to wait on.
  127. */
  128. __u32 id;
  129. /**
  130. * @thresh:
  131. *
  132. * Threshold value for which to wait.
  133. */
  134. __u32 thresh;
  135. /**
  136. * @timeout:
  137. *
  138. * Timeout, in milliseconds, to wait.
  139. */
  140. __u32 timeout;
  141. /**
  142. * @value:
  143. *
  144. * The new syncpoint value after the wait. Set by the kernel upon
  145. * successful completion of the IOCTL.
  146. */
  147. __u32 value;
  148. };
  149. #define DRM_TEGRA_NO_TIMEOUT (0xffffffff)
  150. /**
  151. * struct drm_tegra_open_channel - parameters for the open channel IOCTL
  152. */
  153. struct drm_tegra_open_channel {
  154. /**
  155. * @client:
  156. *
  157. * The client ID for this channel.
  158. */
  159. __u32 client;
  160. /**
  161. * @pad:
  162. *
  163. * Structure padding that may be used in the future. Must be 0.
  164. */
  165. __u32 pad;
  166. /**
  167. * @context:
  168. *
  169. * The application context of this channel. Set by the kernel upon
  170. * successful completion of the IOCTL. This context needs to be passed
  171. * to the DRM_TEGRA_CHANNEL_CLOSE or the DRM_TEGRA_SUBMIT IOCTLs.
  172. */
  173. __u64 context;
  174. };
  175. /**
  176. * struct drm_tegra_close_channel - parameters for the close channel IOCTL
  177. */
  178. struct drm_tegra_close_channel {
  179. /**
  180. * @context:
  181. *
  182. * The application context of this channel. This is obtained from the
  183. * DRM_TEGRA_OPEN_CHANNEL IOCTL.
  184. */
  185. __u64 context;
  186. };
  187. /**
  188. * struct drm_tegra_get_syncpt - parameters for the get syncpoint IOCTL
  189. */
  190. struct drm_tegra_get_syncpt {
  191. /**
  192. * @context:
  193. *
  194. * The application context identifying the channel for which to obtain
  195. * the syncpoint ID.
  196. */
  197. __u64 context;
  198. /**
  199. * @index:
  200. *
  201. * Index of the client syncpoint for which to obtain the ID.
  202. */
  203. __u32 index;
  204. /**
  205. * @id:
  206. *
  207. * The ID of the given syncpoint. Set by the kernel upon successful
  208. * completion of the IOCTL.
  209. */
  210. __u32 id;
  211. };
  212. /**
  213. * struct drm_tegra_get_syncpt_base - parameters for the get wait base IOCTL
  214. */
  215. struct drm_tegra_get_syncpt_base {
  216. /**
  217. * @context:
  218. *
  219. * The application context identifying for which channel to obtain the
  220. * wait base.
  221. */
  222. __u64 context;
  223. /**
  224. * @syncpt:
  225. *
  226. * ID of the syncpoint for which to obtain the wait base.
  227. */
  228. __u32 syncpt;
  229. /**
  230. * @id:
  231. *
  232. * The ID of the wait base corresponding to the client syncpoint. Set
  233. * by the kernel upon successful completion of the IOCTL.
  234. */
  235. __u32 id;
  236. };
  237. /**
  238. * struct drm_tegra_syncpt - syncpoint increment operation
  239. */
  240. struct drm_tegra_syncpt {
  241. /**
  242. * @id:
  243. *
  244. * ID of the syncpoint to operate on.
  245. */
  246. __u32 id;
  247. /**
  248. * @incrs:
  249. *
  250. * Number of increments to perform for the syncpoint.
  251. */
  252. __u32 incrs;
  253. };
  254. /**
  255. * struct drm_tegra_cmdbuf - structure describing a command buffer
  256. */
  257. struct drm_tegra_cmdbuf {
  258. /**
  259. * @handle:
  260. *
  261. * Handle to a GEM object containing the command buffer.
  262. */
  263. __u32 handle;
  264. /**
  265. * @offset:
  266. *
  267. * Offset, in bytes, into the GEM object identified by @handle at
  268. * which the command buffer starts.
  269. */
  270. __u32 offset;
  271. /**
  272. * @words:
  273. *
  274. * Number of 32-bit words in this command buffer.
  275. */
  276. __u32 words;
  277. /**
  278. * @pad:
  279. *
  280. * Structure padding that may be used in the future. Must be 0.
  281. */
  282. __u32 pad;
  283. };
  284. /**
  285. * struct drm_tegra_reloc - GEM object relocation structure
  286. */
  287. struct drm_tegra_reloc {
  288. struct {
  289. /**
  290. * @cmdbuf.handle:
  291. *
  292. * Handle to the GEM object containing the command buffer for
  293. * which to perform this GEM object relocation.
  294. */
  295. __u32 handle;
  296. /**
  297. * @cmdbuf.offset:
  298. *
  299. * Offset, in bytes, into the command buffer at which to
  300. * insert the relocated address.
  301. */
  302. __u32 offset;
  303. } cmdbuf;
  304. struct {
  305. /**
  306. * @target.handle:
  307. *
  308. * Handle to the GEM object to be relocated.
  309. */
  310. __u32 handle;
  311. /**
  312. * @target.offset:
  313. *
  314. * Offset, in bytes, into the target GEM object at which the
  315. * relocated data starts.
  316. */
  317. __u32 offset;
  318. } target;
  319. /**
  320. * @shift:
  321. *
  322. * The number of bits by which to shift relocated addresses.
  323. */
  324. __u32 shift;
  325. /**
  326. * @pad:
  327. *
  328. * Structure padding that may be used in the future. Must be 0.
  329. */
  330. __u32 pad;
  331. };
  332. /**
  333. * struct drm_tegra_waitchk - wait check structure
  334. */
  335. struct drm_tegra_waitchk {
  336. /**
  337. * @handle:
  338. *
  339. * Handle to the GEM object containing a command stream on which to
  340. * perform the wait check.
  341. */
  342. __u32 handle;
  343. /**
  344. * @offset:
  345. *
  346. * Offset, in bytes, of the location in the command stream to perform
  347. * the wait check on.
  348. */
  349. __u32 offset;
  350. /**
  351. * @syncpt:
  352. *
  353. * ID of the syncpoint to wait check.
  354. */
  355. __u32 syncpt;
  356. /**
  357. * @thresh:
  358. *
  359. * Threshold value for which to check.
  360. */
  361. __u32 thresh;
  362. };
  363. /**
  364. * struct drm_tegra_submit - job submission structure
  365. */
  366. struct drm_tegra_submit {
  367. /**
  368. * @context:
  369. *
  370. * The application context identifying the channel to use for the
  371. * execution of this job.
  372. */
  373. __u64 context;
  374. /**
  375. * @num_syncpts:
  376. *
  377. * The number of syncpoints operated on by this job. This defines the
  378. * length of the array pointed to by @syncpts.
  379. */
  380. __u32 num_syncpts;
  381. /**
  382. * @num_cmdbufs:
  383. *
  384. * The number of command buffers to execute as part of this job. This
  385. * defines the length of the array pointed to by @cmdbufs.
  386. */
  387. __u32 num_cmdbufs;
  388. /**
  389. * @num_relocs:
  390. *
  391. * The number of relocations to perform before executing this job.
  392. * This defines the length of the array pointed to by @relocs.
  393. */
  394. __u32 num_relocs;
  395. /**
  396. * @num_waitchks:
  397. *
  398. * The number of wait checks to perform as part of this job. This
  399. * defines the length of the array pointed to by @waitchks.
  400. */
  401. __u32 num_waitchks;
  402. /**
  403. * @waitchk_mask:
  404. *
  405. * Bitmask of valid wait checks.
  406. */
  407. __u32 waitchk_mask;
  408. /**
  409. * @timeout:
  410. *
  411. * Timeout, in milliseconds, before this job is cancelled.
  412. */
  413. __u32 timeout;
  414. /**
  415. * @syncpts:
  416. *
  417. * A pointer to an array of &struct drm_tegra_syncpt structures that
  418. * specify the syncpoint operations performed as part of this job.
  419. * The number of elements in the array must be equal to the value
  420. * given by @num_syncpts.
  421. */
  422. __u64 syncpts;
  423. /**
  424. * @cmdbufs:
  425. *
  426. * A pointer to an array of &struct drm_tegra_cmdbuf structures that
  427. * define the command buffers to execute as part of this job. The
  428. * number of elements in the array must be equal to the value given
  429. * by @num_syncpts.
  430. */
  431. __u64 cmdbufs;
  432. /**
  433. * @relocs:
  434. *
  435. * A pointer to an array of &struct drm_tegra_reloc structures that
  436. * specify the relocations that need to be performed before executing
  437. * this job. The number of elements in the array must be equal to the
  438. * value given by @num_relocs.
  439. */
  440. __u64 relocs;
  441. /**
  442. * @waitchks:
  443. *
  444. * A pointer to an array of &struct drm_tegra_waitchk structures that
  445. * specify the wait checks to be performed while executing this job.
  446. * The number of elements in the array must be equal to the value
  447. * given by @num_waitchks.
  448. */
  449. __u64 waitchks;
  450. /**
  451. * @fence:
  452. *
  453. * The threshold of the syncpoint associated with this job after it
  454. * has been completed. Set by the kernel upon successful completion of
  455. * the IOCTL. This can be used with the DRM_TEGRA_SYNCPT_WAIT IOCTL to
  456. * wait for this job to be finished.
  457. */
  458. __u32 fence;
  459. /**
  460. * @reserved:
  461. *
  462. * This field is reserved for future use. Must be 0.
  463. */
  464. __u32 reserved[5];
  465. };
  466. #define DRM_TEGRA_GEM_TILING_MODE_PITCH 0
  467. #define DRM_TEGRA_GEM_TILING_MODE_TILED 1
  468. #define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2
  469. /**
  470. * struct drm_tegra_gem_set_tiling - parameters for the set tiling IOCTL
  471. */
  472. struct drm_tegra_gem_set_tiling {
  473. /**
  474. * @handle:
  475. *
  476. * Handle to the GEM object for which to set the tiling parameters.
  477. */
  478. __u32 handle;
  479. /**
  480. * @mode:
  481. *
  482. * The tiling mode to set. Must be one of:
  483. *
  484. * DRM_TEGRA_GEM_TILING_MODE_PITCH
  485. * pitch linear format
  486. *
  487. * DRM_TEGRA_GEM_TILING_MODE_TILED
  488. * 16x16 tiling format
  489. *
  490. * DRM_TEGRA_GEM_TILING_MODE_BLOCK
  491. * 16Bx2 tiling format
  492. */
  493. __u32 mode;
  494. /**
  495. * @value:
  496. *
  497. * The value to set for the tiling mode parameter.
  498. */
  499. __u32 value;
  500. /**
  501. * @pad:
  502. *
  503. * Structure padding that may be used in the future. Must be 0.
  504. */
  505. __u32 pad;
  506. };
  507. /**
  508. * struct drm_tegra_gem_get_tiling - parameters for the get tiling IOCTL
  509. */
  510. struct drm_tegra_gem_get_tiling {
  511. /**
  512. * @handle:
  513. *
  514. * Handle to the GEM object for which to query the tiling parameters.
  515. */
  516. __u32 handle;
  517. /**
  518. * @mode:
  519. *
  520. * The tiling mode currently associated with the GEM object. Set by
  521. * the kernel upon successful completion of the IOCTL.
  522. */
  523. __u32 mode;
  524. /**
  525. * @value:
  526. *
  527. * The tiling mode parameter currently associated with the GEM object.
  528. * Set by the kernel upon successful completion of the IOCTL.
  529. */
  530. __u32 value;
  531. /**
  532. * @pad:
  533. *
  534. * Structure padding that may be used in the future. Must be 0.
  535. */
  536. __u32 pad;
  537. };
  538. #define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)
  539. #define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)
  540. /**
  541. * struct drm_tegra_gem_set_flags - parameters for the set flags IOCTL
  542. */
  543. struct drm_tegra_gem_set_flags {
  544. /**
  545. * @handle:
  546. *
  547. * Handle to the GEM object for which to set the flags.
  548. */
  549. __u32 handle;
  550. /**
  551. * @flags:
  552. *
  553. * The flags to set for the GEM object.
  554. */
  555. __u32 flags;
  556. };
  557. /**
  558. * struct drm_tegra_gem_get_flags - parameters for the get flags IOCTL
  559. */
  560. struct drm_tegra_gem_get_flags {
  561. /**
  562. * @handle:
  563. *
  564. * Handle to the GEM object for which to query the flags.
  565. */
  566. __u32 handle;
  567. /**
  568. * @flags:
  569. *
  570. * The flags currently associated with the GEM object. Set by the
  571. * kernel upon successful completion of the IOCTL.
  572. */
  573. __u32 flags;
  574. };
  575. #define DRM_TEGRA_GEM_CREATE 0x00
  576. #define DRM_TEGRA_GEM_MMAP 0x01
  577. #define DRM_TEGRA_SYNCPT_READ 0x02
  578. #define DRM_TEGRA_SYNCPT_INCR 0x03
  579. #define DRM_TEGRA_SYNCPT_WAIT 0x04
  580. #define DRM_TEGRA_OPEN_CHANNEL 0x05
  581. #define DRM_TEGRA_CLOSE_CHANNEL 0x06
  582. #define DRM_TEGRA_GET_SYNCPT 0x07
  583. #define DRM_TEGRA_SUBMIT 0x08
  584. #define DRM_TEGRA_GET_SYNCPT_BASE 0x09
  585. #define DRM_TEGRA_GEM_SET_TILING 0x0a
  586. #define DRM_TEGRA_GEM_GET_TILING 0x0b
  587. #define DRM_TEGRA_GEM_SET_FLAGS 0x0c
  588. #define DRM_TEGRA_GEM_GET_FLAGS 0x0d
  589. #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
  590. #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
  591. #define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
  592. #define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
  593. #define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
  594. #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
  595. #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_close_channel)
  596. #define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
  597. #define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
  598. #define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
  599. #define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)
  600. #define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)
  601. #define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
  602. #define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
  603. #if defined(__cplusplus)
  604. }
  605. #endif
  606. #endif