v3d_drm.h 8.5 KB

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  1. /*
  2. * Copyright © 2014-2018 Broadcom
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. */
  23. #ifndef _V3D_DRM_H_
  24. #define _V3D_DRM_H_
  25. #include "drm.h"
  26. #if defined(__cplusplus)
  27. extern "C" {
  28. #endif
  29. #define DRM_V3D_SUBMIT_CL 0x00
  30. #define DRM_V3D_WAIT_BO 0x01
  31. #define DRM_V3D_CREATE_BO 0x02
  32. #define DRM_V3D_MMAP_BO 0x03
  33. #define DRM_V3D_GET_PARAM 0x04
  34. #define DRM_V3D_GET_BO_OFFSET 0x05
  35. #define DRM_V3D_SUBMIT_TFU 0x06
  36. #define DRM_V3D_SUBMIT_CSD 0x07
  37. #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
  38. #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
  39. #define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
  40. #define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
  41. #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
  42. #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
  43. #define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
  44. #define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)
  45. /**
  46. * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D
  47. * engine.
  48. *
  49. * This asks the kernel to have the GPU execute an optional binner
  50. * command list, and a render command list.
  51. *
  52. * The L1T, slice, L2C, L2T, and GCA caches will be flushed before
  53. * each CL executes. The VCD cache should be flushed (if necessary)
  54. * by the submitted CLs. The TLB writes are guaranteed to have been
  55. * flushed by the time the render done IRQ happens, which is the
  56. * trigger for out_sync. Any dirtying of cachelines by the job (only
  57. * possible using TMU writes) must be flushed by the caller using the
  58. * CL's cache flush commands.
  59. */
  60. struct drm_v3d_submit_cl {
  61. /* Pointer to the binner command list.
  62. *
  63. * This is the first set of commands executed, which runs the
  64. * coordinate shader to determine where primitives land on the screen,
  65. * then writes out the state updates and draw calls necessary per tile
  66. * to the tile allocation BO.
  67. *
  68. * This BCL will block on any previous BCL submitted on the
  69. * same FD, but not on any RCL or BCLs submitted by other
  70. * clients -- that is left up to the submitter to control
  71. * using in_sync_bcl if necessary.
  72. */
  73. __u32 bcl_start;
  74. /** End address of the BCL (first byte after the BCL) */
  75. __u32 bcl_end;
  76. /* Offset of the render command list.
  77. *
  78. * This is the second set of commands executed, which will either
  79. * execute the tiles that have been set up by the BCL, or a fixed set
  80. * of tiles (in the case of RCL-only blits).
  81. *
  82. * This RCL will block on this submit's BCL, and any previous
  83. * RCL submitted on the same FD, but not on any RCL or BCLs
  84. * submitted by other clients -- that is left up to the
  85. * submitter to control using in_sync_rcl if necessary.
  86. */
  87. __u32 rcl_start;
  88. /** End address of the RCL (first byte after the RCL) */
  89. __u32 rcl_end;
  90. /** An optional sync object to wait on before starting the BCL. */
  91. __u32 in_sync_bcl;
  92. /** An optional sync object to wait on before starting the RCL. */
  93. __u32 in_sync_rcl;
  94. /** An optional sync object to place the completion fence in. */
  95. __u32 out_sync;
  96. /* Offset of the tile alloc memory
  97. *
  98. * This is optional on V3D 3.3 (where the CL can set the value) but
  99. * required on V3D 4.1.
  100. */
  101. __u32 qma;
  102. /** Size of the tile alloc memory. */
  103. __u32 qms;
  104. /** Offset of the tile state data array. */
  105. __u32 qts;
  106. /* Pointer to a u32 array of the BOs that are referenced by the job.
  107. */
  108. __u64 bo_handles;
  109. /* Number of BO handles passed in (size is that times 4). */
  110. __u32 bo_handle_count;
  111. /* Pad, must be zero-filled. */
  112. __u32 pad;
  113. };
  114. /**
  115. * struct drm_v3d_wait_bo - ioctl argument for waiting for
  116. * completion of the last DRM_V3D_SUBMIT_CL on a BO.
  117. *
  118. * This is useful for cases where multiple processes might be
  119. * rendering to a BO and you want to wait for all rendering to be
  120. * completed.
  121. */
  122. struct drm_v3d_wait_bo {
  123. __u32 handle;
  124. __u32 pad;
  125. __u64 timeout_ns;
  126. };
  127. /**
  128. * struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.
  129. *
  130. * There are currently no values for the flags argument, but it may be
  131. * used in a future extension.
  132. */
  133. struct drm_v3d_create_bo {
  134. __u32 size;
  135. __u32 flags;
  136. /** Returned GEM handle for the BO. */
  137. __u32 handle;
  138. /**
  139. * Returned offset for the BO in the V3D address space. This offset
  140. * is private to the DRM fd and is valid for the lifetime of the GEM
  141. * handle.
  142. *
  143. * This offset value will always be nonzero, since various HW
  144. * units treat 0 specially.
  145. */
  146. __u32 offset;
  147. };
  148. /**
  149. * struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.
  150. *
  151. * This doesn't actually perform an mmap. Instead, it returns the
  152. * offset you need to use in an mmap on the DRM device node. This
  153. * means that tools like valgrind end up knowing about the mapped
  154. * memory.
  155. *
  156. * There are currently no values for the flags argument, but it may be
  157. * used in a future extension.
  158. */
  159. struct drm_v3d_mmap_bo {
  160. /** Handle for the object being mapped. */
  161. __u32 handle;
  162. __u32 flags;
  163. /** offset into the drm node to use for subsequent mmap call. */
  164. __u64 offset;
  165. };
  166. enum drm_v3d_param {
  167. DRM_V3D_PARAM_V3D_UIFCFG,
  168. DRM_V3D_PARAM_V3D_HUB_IDENT1,
  169. DRM_V3D_PARAM_V3D_HUB_IDENT2,
  170. DRM_V3D_PARAM_V3D_HUB_IDENT3,
  171. DRM_V3D_PARAM_V3D_CORE0_IDENT0,
  172. DRM_V3D_PARAM_V3D_CORE0_IDENT1,
  173. DRM_V3D_PARAM_V3D_CORE0_IDENT2,
  174. DRM_V3D_PARAM_SUPPORTS_TFU,
  175. DRM_V3D_PARAM_SUPPORTS_CSD,
  176. };
  177. struct drm_v3d_get_param {
  178. __u32 param;
  179. __u32 pad;
  180. __u64 value;
  181. };
  182. /**
  183. * Returns the offset for the BO in the V3D address space for this DRM fd.
  184. * This is the same value returned by drm_v3d_create_bo, if that was called
  185. * from this DRM fd.
  186. */
  187. struct drm_v3d_get_bo_offset {
  188. __u32 handle;
  189. __u32 offset;
  190. };
  191. struct drm_v3d_submit_tfu {
  192. __u32 icfg;
  193. __u32 iia;
  194. __u32 iis;
  195. __u32 ica;
  196. __u32 iua;
  197. __u32 ioa;
  198. __u32 ios;
  199. __u32 coef[4];
  200. /* First handle is the output BO, following are other inputs.
  201. * 0 for unused.
  202. */
  203. __u32 bo_handles[4];
  204. /* sync object to block on before running the TFU job. Each TFU
  205. * job will execute in the order submitted to its FD. Synchronization
  206. * against rendering jobs requires using sync objects.
  207. */
  208. __u32 in_sync;
  209. /* Sync object to signal when the TFU job is done. */
  210. __u32 out_sync;
  211. };
  212. /* Submits a compute shader for dispatch. This job will block on any
  213. * previous compute shaders submitted on this fd, and any other
  214. * synchronization must be performed with in_sync/out_sync.
  215. */
  216. struct drm_v3d_submit_csd {
  217. __u32 cfg[7];
  218. __u32 coef[4];
  219. /* Pointer to a u32 array of the BOs that are referenced by the job.
  220. */
  221. __u64 bo_handles;
  222. /* Number of BO handles passed in (size is that times 4). */
  223. __u32 bo_handle_count;
  224. /* sync object to block on before running the CSD job. Each
  225. * CSD job will execute in the order submitted to its FD.
  226. * Synchronization against rendering/TFU jobs or CSD from
  227. * other fds requires using sync objects.
  228. */
  229. __u32 in_sync;
  230. /* Sync object to signal when the CSD job is done. */
  231. __u32 out_sync;
  232. };
  233. #if defined(__cplusplus)
  234. }
  235. #endif
  236. #endif /* _V3D_DRM_H_ */