virtgpu_drm.h 4.9 KB

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  1. /*
  2. * Copyright 2013 Red Hat
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #ifndef VIRTGPU_DRM_H
  25. #define VIRTGPU_DRM_H
  26. #include "drm.h"
  27. #if defined(__cplusplus)
  28. extern "C" {
  29. #endif
  30. /* Please note that modifications to all structs defined here are
  31. * subject to backwards-compatibility constraints.
  32. *
  33. * Do not use pointers, use __u64 instead for 32 bit / 64 bit user/kernel
  34. * compatibility Keep fields aligned to their size
  35. */
  36. #define DRM_VIRTGPU_MAP 0x01
  37. #define DRM_VIRTGPU_EXECBUFFER 0x02
  38. #define DRM_VIRTGPU_GETPARAM 0x03
  39. #define DRM_VIRTGPU_RESOURCE_CREATE 0x04
  40. #define DRM_VIRTGPU_RESOURCE_INFO 0x05
  41. #define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06
  42. #define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
  43. #define DRM_VIRTGPU_WAIT 0x08
  44. #define DRM_VIRTGPU_GET_CAPS 0x09
  45. #define VIRTGPU_EXECBUF_FENCE_FD_IN 0x01
  46. #define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x02
  47. #define VIRTGPU_EXECBUF_FLAGS (\
  48. VIRTGPU_EXECBUF_FENCE_FD_IN |\
  49. VIRTGPU_EXECBUF_FENCE_FD_OUT |\
  50. 0)
  51. struct drm_virtgpu_map {
  52. __u64 offset; /* use for mmap system call */
  53. __u32 handle;
  54. __u32 pad;
  55. };
  56. struct drm_virtgpu_execbuffer {
  57. __u32 flags;
  58. __u32 size;
  59. __u64 command; /* void* */
  60. __u64 bo_handles;
  61. __u32 num_bo_handles;
  62. __s32 fence_fd; /* in/out fence fd (see VIRTGPU_EXECBUF_FENCE_FD_IN/OUT) */
  63. };
  64. #define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
  65. #define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */
  66. struct drm_virtgpu_getparam {
  67. __u64 param;
  68. __u64 value;
  69. };
  70. /* NO_BO flags? NO resource flag? */
  71. /* resource flag for y_0_top */
  72. struct drm_virtgpu_resource_create {
  73. __u32 target;
  74. __u32 format;
  75. __u32 bind;
  76. __u32 width;
  77. __u32 height;
  78. __u32 depth;
  79. __u32 array_size;
  80. __u32 last_level;
  81. __u32 nr_samples;
  82. __u32 flags;
  83. __u32 bo_handle; /* if this is set - recreate a new resource attached to this bo ? */
  84. __u32 res_handle; /* returned by kernel */
  85. __u32 size; /* validate transfer in the host */
  86. __u32 stride; /* validate transfer in the host */
  87. };
  88. struct drm_virtgpu_resource_info {
  89. __u32 bo_handle;
  90. __u32 res_handle;
  91. __u32 size;
  92. __u32 stride;
  93. };
  94. struct drm_virtgpu_3d_box {
  95. __u32 x;
  96. __u32 y;
  97. __u32 z;
  98. __u32 w;
  99. __u32 h;
  100. __u32 d;
  101. };
  102. struct drm_virtgpu_3d_transfer_to_host {
  103. __u32 bo_handle;
  104. struct drm_virtgpu_3d_box box;
  105. __u32 level;
  106. __u32 offset;
  107. };
  108. struct drm_virtgpu_3d_transfer_from_host {
  109. __u32 bo_handle;
  110. struct drm_virtgpu_3d_box box;
  111. __u32 level;
  112. __u32 offset;
  113. };
  114. #define VIRTGPU_WAIT_NOWAIT 1 /* like it */
  115. struct drm_virtgpu_3d_wait {
  116. __u32 handle; /* 0 is an invalid handle */
  117. __u32 flags;
  118. };
  119. struct drm_virtgpu_get_caps {
  120. __u32 cap_set_id;
  121. __u32 cap_set_ver;
  122. __u64 addr;
  123. __u32 size;
  124. __u32 pad;
  125. };
  126. #define DRM_IOCTL_VIRTGPU_MAP \
  127. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
  128. #define DRM_IOCTL_VIRTGPU_EXECBUFFER \
  129. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
  130. struct drm_virtgpu_execbuffer)
  131. #define DRM_IOCTL_VIRTGPU_GETPARAM \
  132. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM,\
  133. struct drm_virtgpu_getparam)
  134. #define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE \
  135. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE, \
  136. struct drm_virtgpu_resource_create)
  137. #define DRM_IOCTL_VIRTGPU_RESOURCE_INFO \
  138. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, \
  139. struct drm_virtgpu_resource_info)
  140. #define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST \
  141. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST, \
  142. struct drm_virtgpu_3d_transfer_from_host)
  143. #define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST \
  144. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST, \
  145. struct drm_virtgpu_3d_transfer_to_host)
  146. #define DRM_IOCTL_VIRTGPU_WAIT \
  147. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT, \
  148. struct drm_virtgpu_3d_wait)
  149. #define DRM_IOCTL_VIRTGPU_GET_CAPS \
  150. DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
  151. struct drm_virtgpu_get_caps)
  152. #if defined(__cplusplus)
  153. }
  154. #endif
  155. #endif