miniport.h 5.5 KB

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  1. /*
  2. * miniport.h
  3. *
  4. * Type definitions for miniport drivers
  5. *
  6. * This file is part of the w32api package.
  7. *
  8. * Contributors:
  9. * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
  10. *
  11. * THIS SOFTWARE IS NOT COPYRIGHTED
  12. *
  13. * This source code is offered for use in the public domain. You may
  14. * use, modify or distribute it freely.
  15. *
  16. * This code is distributed in the hope that it will be useful but
  17. * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
  18. * DISCLAIMED. This includes but is not limited to warranties of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  20. *
  21. */
  22. #ifndef _MINIPORT_
  23. #define _MINIPORT_
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27. #define EMULATOR_READ_ACCESS 0x01
  28. #define EMULATOR_WRITE_ACCESS 0x02
  29. typedef enum _EMULATOR_PORT_ACCESS_TYPE {
  30. Uchar,
  31. Ushort,
  32. Ulong
  33. } EMULATOR_PORT_ACCESS_TYPE, *PEMULATOR_PORT_ACCESS_TYPE;
  34. typedef struct _EMULATOR_ACCESS_ENTRY {
  35. ULONG BasePort;
  36. ULONG NumConsecutivePorts;
  37. EMULATOR_PORT_ACCESS_TYPE AccessType;
  38. UCHAR AccessMode;
  39. UCHAR StringSupport;
  40. PVOID Routine;
  41. } EMULATOR_ACCESS_ENTRY, *PEMULATOR_ACCESS_ENTRY;
  42. typedef VOID
  43. (NTAPI *PBANKED_SECTION_ROUTINE)(
  44. IN ULONG ReadBank,
  45. IN ULONG WriteBank,
  46. IN PVOID Context);
  47. #ifndef __BROKEN__
  48. typedef enum _INTERFACE_TYPE {
  49. InterfaceTypeUndefined = -1,
  50. Internal,
  51. Isa,
  52. Eisa,
  53. MicroChannel,
  54. TurboChannel,
  55. PCIBus,
  56. VMEBus,
  57. NuBus,
  58. PCMCIABus,
  59. CBus,
  60. MPIBus,
  61. MPSABus,
  62. ProcessorInternal,
  63. InternalPowerBus,
  64. PNPISABus,
  65. PNPBus,
  66. Vmcs,
  67. MaximumInterfaceType
  68. }INTERFACE_TYPE, *PINTERFACE_TYPE;
  69. typedef enum _KINTERRUPT_MODE {
  70. LevelSensitive,
  71. Latched
  72. } KINTERRUPT_MODE;
  73. typedef VOID (*PINTERFACE_REFERENCE)(PVOID Context);
  74. typedef VOID (*PINTERFACE_DEREFERENCE)(PVOID Context);
  75. typedef enum _BUS_DATA_TYPE {
  76. ConfigurationSpaceUndefined = -1,
  77. Cmos,
  78. EisaConfiguration,
  79. Pos,
  80. CbusConfiguration,
  81. PCIConfiguration,
  82. VMEConfiguration,
  83. NuBusConfiguration,
  84. PCMCIAConfiguration,
  85. MPIConfiguration,
  86. MPSAConfiguration,
  87. PNPISAConfiguration,
  88. SgiInternalConfiguration,
  89. MaximumBusDataType
  90. } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
  91. typedef enum _DMA_WIDTH {
  92. Width8Bits,
  93. Width16Bits,
  94. Width32Bits,
  95. MaximumDmaWidth
  96. }DMA_WIDTH, *PDMA_WIDTH;
  97. typedef enum _DMA_SPEED {
  98. Compatible,
  99. TypeA,
  100. TypeB,
  101. TypeC,
  102. TypeF,
  103. MaximumDmaSpeed
  104. }DMA_SPEED, *PDMA_SPEED;
  105. typedef struct _INTERFACE {
  106. USHORT Size;
  107. USHORT Version;
  108. PVOID Context;
  109. PINTERFACE_REFERENCE InterfaceReference;
  110. PINTERFACE_DEREFERENCE InterfaceDereference;
  111. } INTERFACE, *PINTERFACE;
  112. typedef enum _IRQ_DEVICE_POLICY {
  113. IrqPolicyMachineDefault = 0,
  114. IrqPolicyAllCloseProcessors,
  115. IrqPolicyOneCloseProcessor,
  116. IrqPolicyAllProcessorsInMachine,
  117. IrqPolicySpecifiedProcessors,
  118. IrqPolicySpreadMessagesAcrossAllProcessors
  119. } IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
  120. typedef enum _IRQ_PRIORITY {
  121. IrqPriorityUndefined = 0,
  122. IrqPriorityLow,
  123. IrqPriorityNormal,
  124. IrqPriorityHigh
  125. } IRQ_PRIORITY, *PIRQ_PRIORITY;
  126. typedef struct _IO_RESOURCE_DESCRIPTOR {
  127. UCHAR Option;
  128. UCHAR Type; // use CM_RESOURCE_TYPE
  129. UCHAR ShareDisposition; // use CM_SHARE_DISPOSITION
  130. UCHAR Spare1;
  131. USHORT Flags; // use CM resource flag defines
  132. USHORT Spare2; // align
  133. union {
  134. struct {
  135. ULONG Length;
  136. ULONG Alignment;
  137. PHYSICAL_ADDRESS MinimumAddress;
  138. PHYSICAL_ADDRESS MaximumAddress;
  139. } Port;
  140. struct {
  141. ULONG Length;
  142. ULONG Alignment;
  143. PHYSICAL_ADDRESS MinimumAddress;
  144. PHYSICAL_ADDRESS MaximumAddress;
  145. } Memory;
  146. struct {
  147. ULONG MinimumVector;
  148. ULONG MaximumVector;
  149. IRQ_DEVICE_POLICY AffinityPolicy;
  150. IRQ_PRIORITY PriorityPolicy;
  151. KAFFINITY TargetedProcessors;
  152. } Interrupt;
  153. struct {
  154. ULONG MinimumChannel;
  155. ULONG MaximumChannel;
  156. } Dma;
  157. struct {
  158. ULONG Length;
  159. ULONG Alignment;
  160. PHYSICAL_ADDRESS MinimumAddress;
  161. PHYSICAL_ADDRESS MaximumAddress;
  162. } Generic;
  163. struct {
  164. ULONG Data[3];
  165. } DevicePrivate;
  166. //
  167. // Bus Number information.
  168. //
  169. struct {
  170. ULONG Length;
  171. ULONG MinBusNumber;
  172. ULONG MaxBusNumber;
  173. ULONG Reserved;
  174. } BusNumber;
  175. struct {
  176. ULONG Priority; // use LCPRI_Xxx values in cfg.h
  177. ULONG Reserved1;
  178. ULONG Reserved2;
  179. } ConfigData;
  180. //
  181. // The following structures provide descriptions
  182. // for memory resource requirement greater than MAXULONG
  183. //
  184. struct {
  185. ULONG Length40;
  186. ULONG Alignment40;
  187. PHYSICAL_ADDRESS MinimumAddress;
  188. PHYSICAL_ADDRESS MaximumAddress;
  189. } Memory40;
  190. struct {
  191. ULONG Length48;
  192. ULONG Alignment48;
  193. PHYSICAL_ADDRESS MinimumAddress;
  194. PHYSICAL_ADDRESS MaximumAddress;
  195. } Memory48;
  196. struct {
  197. ULONG Length64;
  198. ULONG Alignment64;
  199. PHYSICAL_ADDRESS MinimumAddress;
  200. PHYSICAL_ADDRESS MaximumAddress;
  201. } Memory64;
  202. } u;
  203. } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
  204. #include <guiddef.h>
  205. #endif /* ! __BROKEN__ */
  206. #ifdef __cplusplus
  207. }
  208. #endif
  209. #endif /* __MINIPORT_H */